Hitachi, Tohoku Univ. Jointly Prototype 2 Mbit Nonvolatile RAM Based on Spin Torque Transfer

Feb 15, 2007 18:26 Motoyuki Ooishi, Nikkei Electronics and Junichi Ooshita, Nikkei Microdevices

Hitachi, Ltd. and Prof. Hideo Ohno of The Research Institute of Electrical Communication, Tohoku University have jointly prototyped a 2 Mbit nonvolatile RAM chip based on the spin torque transfer writing technology. When a 1.8 V voltage is supplied, the write and read times are 100 and 40 ns, respectively. TMR elements used in the chip were produced by the Tohoku Univ. lab while the chip designed with a 0.2 μm rule process technology was manufactured by Hitachi. The details were presented at the ISSCC 2007 event being held in San Francisco on February 14 (US time).

Write current of 200 μA, cell size of 16F²

The nonvolatile RAM based on spin torque transfer is designed to eliminate write lines for magnetic field generation used in a magnetoresistive RAM (MRAM). Instead, data rewriting is performed by the current flown through memory elements (TMR elements). In this way, the spin torque transfer RAM can solve a problem of the write current in MRAM which increases as miniaturization accelerates. Thus far, Hitachi and Tohoku Univ. have jointly examined the principles of this method at the element level.

The write current of the prototyped RAM is 200 μA/cell, lower than that of a standard MRAM. It was demonstrated that data can be rewritten 109 times with a 100 ns pulse current. The chip measures 5.32 x 2.5 mm. The cell size is 1.6 x 1.6 μm, which is equivalent to 16F2 (F is the design rule of cell section which equals to 0.4 μm). This is smaller than a standard MRAM cell. It is reported that 10F2 is also feasible by improving the design layout. The magnetoresistance ratio of the TMR element is approximately 100. Incidentally, Sony Corp. presented a prototype of 4 Kbit Nonvolatile RAM based on spin torque transfer at the 2005 IEDM event. The capacity of the latest MRAM is nearly three orders of magnitude larger than that of Sony's product.

Adoption of circuit technology to prevent erroneous writing

The joint team of Hitachi and Tohoku Univ. developed two major circuit technologies. One is a circuit technology relating to bidirectional current switching. The signal writing circuit of the pervasive semiconductor memories has a unidirectional configuration in which the current flows from the bit line through the memory cell to the ground. In contrast, a spin torque transfer RAM requires a bidirectional current flow. The team provided two bit lines in a single memory cell and used one as the ground depending on the direction in which the current flows.

The other technology relates to the prevention of erroneous writing at the time of data reading. Since the current is flown through a TMR element both in reading and writing, the spin torque transfer writing technology entails a possibility of information being accidentally altered by the read current. The joint team discovered from the analysis of characteristics of the TMR elements that the occurrence rate of erroneous writing at the time of reading depends on the direction of read current.

Specifically, the occurrence of erroneous writing can be reduced by making the read current to flow in such direction so as to align the magnetization direction of TMR elements. In addition, it was also discovered that the resistance ratio of TMR elements at the time of reading increases as the voltage of bit lines lowers. Based on these findings, the team has solve the problem of erroneous writing at the time of reading by using such read current that flows in the direction to align the magnetization direction of the TMR elements, and by reducing the voltage of the bit lines to 0.7 V.

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