Renesas Electronics Corp developed a technology to prevent the defects of SRAM caused by degradation over time at the 6th Int'l Automotive Electronics Technology Expo, which took place from Jan 15 to 17, 2014, in Tokyo.
The technology is targeted at system LSIs to be used for more than 10 years such as automotive system LSIs. It is designed to prevent "NBTI (negative bias temperature instability)," a phenomenon where the defect rate of SRAM increases over time due to the deterioration of PMOS transistor, etc. This phenomenon even affects non-defective SRAM at the time of production.
Before the development of the new technology, Renesas designed SRAM with a margin set in consideration of secular change over 10 years. Therefore, it was not possible to optimize operation speed or power consumption. Moreover, if the SRAM was used for longer than the period that was expected at the time of designing, a defect could suddenly occur.
This time, Renesas introduced three technologies. The first technology is called "operation margin expansion design," a circuit technology that increases the difference between "1" and "0" of SRAM's reading voltage. It controls word lines and cell bias.
The second is a defect prediction technology. It performs a virtual accelerated test when SRAM is in operation to confirm that there will be no defect. In the test, data is temporarily unloaded from the SRAM. If a defect occurs in the test, it is considered to potentially occur in the near future when the SRAM is in normal operation. So, the second technology enables to warn the system or the user.
The third technology is for preventing defects. When a detect is predicted with the second technology, it expands operation margin in the same way as the first technology. It can drastically reduce the possibility of critical defects, Renesas said.