[Interview] Intel Might Become Only Major IDM in World (2)

Aug 17, 2009 17:43 Ikutaro Kojima, Editorial Staff

Continued from [Interview] Intel Might Become Only Major IDM in World (1)

Virtual platform gaining in importance

Q: Why do you think the number of SoC and logic LSI chip makers will decrease?

SoCs are developed basically by combining IP cores. Therefore, IDMs have to have powerful IP cores, design techniques to integrate IP cores and advanced processes. But it is not easy to have all of them.

Many of the processes for SoCs are developed by silicon foundries. General-purpose IP cores are supplied by IP providers. And IP cores that differentiate products are developed by system/device manufacturers. It is difficult to run a business as an IDM.

Q: Can't design techniques to integrate IP cores be an added value to semiconductor manufacturers other than Intel?

I am not sure if fabless firms making money on design techniques to integrate IP cores can be called semiconductor manufacturers. But those techniques, as well as powerful IP cores, are one of the important elements for differentiating SoCs.

Q: I think many of the logic LSI chip makers have design techniques to integrate IP cores.

In current SoC designs, the interface from a device to a semiconductor chip is RTL (register transfer level). But, in this case, the level of abstraction is too low. A development manager of a Japanese device maker said, "I don't like to have my designers write Verilog-HDL codes. I would like to ask them to do work of higher value such as creating concepts of devices."

It is important to bridge such a gap between device makers and semiconductor chip makers. I call the capability for device makers to easily develop desired chips "PowerPoint to Silicon", "Concept to Silicon" or "Software to Silicon."

Q: "Concept to Silicon" and "Software to Silicon" sound like advertising copies of behavioral synthesis tool vendors.

Current behavioral synthesis tools are for designing the interiors of IP cores. But it is now demanded to develop chips desired by device makers in a short period of time by combining existing IP cores.

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