The University of Tokyo and its partners disclosed a new power supply system for SSDs (solid state drives) at ISSCC (International Solid State Circuits Conference) 2009.
The system can not only reduce power consumption of NAND flash memory incorporated in an SSD to 1/3 but also contribute to cost reduction. It is intended for use by so-called three-dimensional SSDs, in which components such as memory chips are three-dimensionally multilayered.
According to the university, it has been difficult to reduce power consumption of NAND flash memory as expected even if the power supply voltage can be lowered. While reduction of power supply voltage is effective for lowering power consumption of the memory cell, it increases the power consumed by charge pumps for memory chips.
To solve this problem, the University of Tokyo and its partners developed a new power supply system using a boost converter. The new system is composed of a power supply control circuit, a high voltage switch and a coil.
The system features higher output current as well as higher power efficiency compared with a system that uses charge pumps. Therefore, it consumes less power and requires smaller area to generate high voltage that NAND flash memory needs.
In other words, the power supply system using the boost converter can eliminate the need for charge pumps mounted on each of multiple NAND flash memory chips inside the SSD. As a result, power supply voltage of NAND flash memory can be reduced from current 3V to 1.8V, and its power consumption can be cut by about 68%.
Moreover, the new power supply system contributes to cost reduction of SSDs. This is because chip areas of 40nm- to 30nm-generation NAND flash memories can be reduced by 5 to 10% following the elimination of charge pumps.
The interposer wiring that connects the chips is used for the coil that makes up the boost converter. The power supply control circuit and the high voltage switch can be formed by a low cost 180nm-generation process.
Technologies for the power supply circuit and the three-dimensional IC were developed by a group led by professor Takayasu Sakurai and associate professor Makoto Takamiya at the Institute of Industrial Science, the University of Tokyo. The technology for the NAND flash memory circuit was developed by a group led by associate professor Ken Takeuchi at Graduate School of Engineering, the University of Tokyo. And the NAND flash memory was manufactured by Toshiba Corp.
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