[DAC Highlights] Wave of Automation Sweeping Across Analog Design Tools [Part 1]

Aug 19, 2008 17:55 Ikutaro Kojima, Editorial Staff

For some reasons, the roundup of the DAC (Design Automation Conference) has become an annual event in summer break.

This year, DAC 2008 took place in Anaheim, Calif, the US. Anaheim is not a popular city among participants because there is no places of interest except for a famous theme park and there are few restaurants within walking distance.

To make matters worse, Cadence Design Systems Inc did not participate in the conference. Probably because of those factors, the turnout was only 7,770 (press release: PDF), 13.4% less than that of the past year's DAC. The number of exhibitors also declined by 14% year-on-year to 215.

Still, there are some eye-catching new exhibitors and products, which will be introduced below. DAC 2009 will take place at the Moscone Center located in the center of San Francisco from July 26 to 31, 2009.

A wave of automation sweeping across analog design tools

Though analog design tools were showcased mainly in the suites in DAC 2007, they were also exhibited in the open floors this time. For example, SynCira Corp showed off an automatic arrangement wiring tool for analog circuits. It reads in a SPICE netlist and outputs in GDSII format.

In DAC 2007, only the arrangement function was completed, but, this time, the company exhibited a tool that has functions of both arrangement and wiring. In general, arrangement process precedes wiring process for analog designs. But SynCira's tool carries out the two processes at the same time.

The company completed all the functions and announced the results of a benchmark test, but it has yet to develop a business model. The company considers, for example, selling the tool as an EDA vendor to its customers or selling the technology to other EDA vendors, it said.

Get2Spec Inc showcased an EDA system for analog designs. The system, "Analog Rails," was exhibited in a small suite in the past year, but it was presented in an open booth this time. The system is equipped with all the tools necessary to design analog/analog-digital chips including a schematic editor, simulator, layout design tool.

The windows for circuit design and layout design become active at the same time. Also, so-called "Correct by Construction," a design without design rule violation, is realized with an online DRC function and so forth, Get2Spec said. The company will begin shipping the product Aug 31, 2008, according to the company's Website.

CWS (Coupling Wave Solutions) SA reinforced the lineup of its noise analysis EDA tools for analog-digital mixed SoCs. So far, the company has provided noise analysis tools for the lower processes (layout design and after). But, this time, it introduced a noise prediction tool for use in the upper processes (circuit/logic design and before).

• [DAC Highlights] Circuit Library w/ Straight-patterned Polycrystalline Silicon [Part 2]
• [DAC Highlights] '3rd-gen Verification Method' Under Development [Part 3]

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