Car navigation systems have attained widespread popularity in recent years. High-end car navigation systems are capable of updating themselves in response to data on vehicle speed, driving conditions, etc, supplied via a controller area network (CAN) network, making it possible to provide highly accurate guidance regarding incidents such as the estimated time remaining to the destination. It has also become common for car navigation systems to incorporate multimedia functions.
As a result, the CPU of the system-on-chip (SoC) used must be able to execute multiple processes simultaneously, and there is demand for performance levels in some cases exceeding those of a typical PC CPU.
The SH-Navi series of car information system (CIS) SoCs from Renesas has been designed for embedded car navigation applications. The company addresses the expanding market demand with a three-tiered product structure: the SH-Navi series which features high-speed CPU operation combined with on-chip functions including high-level, realistic graphics capabilities and image recognition; the SH-NaviJ series with high-level graphics capabilities and basic navigation functions on-chip for a system cost-performance; and the SH-MobileR series offering on-chip functions including multi-Codec video processing IP and low power consumption suitable for removable systems.
The SH-Navi3 (SH7776) from the SH-Navi series features a dual core SoC which accommodates high-level navigation functions for future systems. It incorporates dual SH-4A 32-bit CPUs and delivers maximum processing performance of 1,920 MIPS (960 MIPS x 2) when operating at 533MHz. It supports both conventional symmetric multiprocessing (SMP) and asymmetric multiprocessing (AMP), in which different operating systems (or multiple instances of the same OS) and completely different programs run on each CPU. One CPU can be devoted to navigation processing while the other performs image recognition processing such as lane detection; and all of these are accomplished on a single chip.
The SH-Navi3 also has a domain separation function which prevents one CPU from accessing and changing data in the memory area assigned to the other CPU.
The platform employs a dedicated 3D graphics engine and a 2D/3D graphics processor for realistic graphics performance. The dedicated 3D graphics engine - the PowerVR SGX - delivers approximately twice the functionality of earlier products. The 2D/3D graphics processor enables more robust graphics rendering, supporting not only 3D rendering for navigation tasks but also making possible multimedia applications such as a human-machine interface (HMI) with expressive 3D rendering.
There are also on-chip functions for image recognition processing that can be utilized to provide driving support system capabilities such as lane recognition. The SH-Navi3 performs image recognition processing approximately 3.5 times faster due to a higher degree of internal parallelism and increased bus width. An on-chip distortion compensation module transforms images captured by the camera into any desirable form.
The SH-NaviJ series is intended to provide low-cost solutions while maintaining software continuity with earlier SH-Navi series products. With function set simplified in comparison with earlier SH-Navi series, the SH-NaviJ1 retains the same internal bus configuration. It utilizes a simplified microchip design with selected functions to provide real time capabilities that are adequate for many applications. The SH-NaviJ1 also enables configuration of a system using only one external DDR2 memory device (16-bit bus), instead of the four DDR1 memory devices previously required.
In addition, a process used to fabricate microchips for mobile phone applications is employed in the SH-NaviJ1 to reduce heat generation, allowing the use of a smaller package and reducing costs associated with heat dispersion. To accommodate large-capacity Flash memory, the SD card interface has been boosted to two channels. By using this capacity in conjunction with program memory, this SoC can reduce the total cost of the system. The SH-NaviJ provides the minimum necessary specifications for embedded car navigation capabilities.
There will be demand for still better CPU performance in future as car information systems become more intelligent and gain new capabilities, such as image recognition applications for enhanced safety, ITS wireless communication applications based on advanced connectivity technology, and natural language voice recognition.
by Isamu Hayashi,
Group Manager,
Automotive Semiconductor Business Unit,
MCU Business Group,
Renesas Technology Corp
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