Nikkei Electronics Asia -- October 2007
Feature
Makers Use New Analog Circuit Verification Tools

Berkeley Design Automation Inc of the US, a new electronic design automation (EDA) vendor, is collecting support from both Japanese and overseas integrated circuit (IC) developers and manufacturers for its analog/radio frequency (RF) circuit verification tools. The firm made a splash in 2006 when Matsushita Electric Industrial Co Ltd of Japan invested in it, and now the firm's user base is climbing rapidly. In 2007 eight firms became new users, including Qualcomm Inc of the US, Atheros Communications Inc of the US, and Niigata Seimitsu Co Ltd of Japan. One of them, Toshiba Corp of Japan, has adopted the tool for consumer electronics ICs at the end of June 2007. There are now 30 or more companies using Berkeley Design Automation tools, with application in over 500 circuits.

Verify before Prototype
The leading tool from Berkeley Design Automation is Analog FastSPICE, which offers high-speed verification of performance, function, etc, for analog circuit macros such as serializer/deserializers and multi-channel DC-DC converters. It offers precision on a par with SPICE simulators but in only 10% to 20% of the time (see Table). IC manufacturers are adopting Analog FastSPICE, according to a source at Berkeley Design Automation, because "There aren't any other tools with those characteristics." There are EDA tools capable of verifying circuits at high speed, but only at low precision. The low precision means that even if IC manufacturers verify analog circuit function in the simulation stage, they are often unable to verify performance, forcing them to make a prototype chip for each analog circuit macro, to verify circuit performance. This increases development time, development cost and other items. Analog FastSPICE eliminates the need for these performance verification prototypes.

Berkeley Design Automation's tools are attracting so much attention because of steadily shrinking design rules.
Manufacturing at 90nm or below makes it possible to use complementary metal-oxide semiconductor (CMOS) technology to single-chip digital and various analog circuits. The integration level rises, but it also becomes difficult to verify analog circuits for two reasons. First, it is not trivial to implement analog circuits with high-level functionality using CMOS transistors. Second, reductions in supply voltage will degrade analog circuit signal to noise (S/N) ratios.

Especially when it is difficult to achieve optimal performance in design, high-precision verification in the design state is essential.

by Motoyuki Ooishi

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