Nikkei Electronics Asia -- February 2007
Tech Feature
65nm-Generation FPGAs to Replace Cell-Based ICs

Xilinx Inc of the US and Altera Corp of US, who between them command about 90% of the market in field-programmable gate arrays (FPGA), are expanding their lines of 65nm-generation chips (Table 1).

Xilinx was the first to announce product, starting with the Virtex-5 high-end FPGA based on 65nm-generation semiconductor technology in May 2006, followed shortly by sample shipments of the Virtex-5 LX model for general application. In October 2006 it disclosed the specifications of the Virtex-5 LXT, provided with a high-speed serial interface, and began sample shipment.

In November 2006 Altera responded by announcing the Stratix III, a high-end 65nm-generation FPGA. The first samples will ship in the 3rd quarter of 2007.

FPGAs Cheaper to Develop
Both firms are releasing 65nm product to the market in the hope of accelerating replacement of cell-based integrated circuits (IC). FPGAs are said to be cheaper to develop than cell-based ICs, because development costs for masks and other items for cell-based ICs rises sharply as chip geometry shrinks. The masks for 65nm-generation cell-based ICs cost Yen200 million or more. FPGAs, on the other hand, don't have mask costs.

Moving to 65nm process technology will further reduce the difference in performance and integration level, where cell-based ICs have held the advantage until now. According to Xilinx, "65nm-generation FPGAs can match the performance and integration level of about 80% of all cell-based ICs available in recent years."

Both firms cite three key merits of 65nm-generation over today's 90nm-generation FPGAs, all due to the finer process technology: (1) 25% to 30% higher operating frequency, (2) 65% to 100% increase in integration level, and (3) cost reductions of 30% or more.

For equipment manufacturers requiring high-speed serial interfaces, the Virtex-5 LXT from Xilinx is especially nice. Unlike existing FPGAs, it can be used with inexpensive PCI Express. When PCI Express is implemented in FPGAs, it costs users several million yen in intellectual property (IP) core fees for the logic layer, etc. IP core fees are not required with the Virtex-5 LXT.

Battling Leakage Current
The 65nm geometry is not all good news, though. High-end FPGAs require high-speed transistors, so that smaller geometry usually means an increase in leakage current and dissipation. Altera explained that unless special measures are implemented, dissipation can easily exceed maximum levels set by users. The two firms use different approaches to resolve the problem.

Xilinx's 65nm chips offer a 35% reduction in operating power and equivalent stand-by dissipation as a 90nm chip of the same integration level from the firm. A variety of improvements were used to achieve this, including the adoption of "triple-oxide" technology forming three types of transistor with different oxide film thicknesses on the same transistor, lower supply voltage, and a different basic logic structure.

Altera, on the other hand, has managed to slash dissipation to about half that of a 90nm design with the same integration level. In addition to triple-oxide and other technologies, Altera also introduced two new technologies. The first allows the user to select the internal circuit supply voltage (core voltage). Performance-critical applications can run at 1.1V, and power-critical applications at 0.9V.  

The second is Programmable Power Technology, which can precisely control the operating mode for each circuit block individually. The optimal operating modes for each logic array block (LAB), digital signal processor (DSP) block and memory block is set automatically by the firm's Quartus II Version 6.1 integrated circuit environment for FPGAs, allowing users to select high-speed, low-dissipation or disable modes. Altera explained, "The supply voltage for the entire circuit is fixed at either 1.1V or 0.9V. Changes in operating mode are implemented by adjusting things like the voltages controlling transistor performance, excluding supply voltage." The goal is to minimize dissipation without sacrificing performance.

Volume Production
It is probable that Xilinx will be first to volume-produce 65nm-generation FPGAs. A source at the firm said, "We will begin volume production of the Virtex-5 LX and LXT in the second quarter of 2007. Lines are ramping up smoothly at both outsourced fabs, Toshiba and Taiwan's United Microelectronics Corp. The transition from 90nm to 65nm is going smoother than even the one from 130mn to 90nm did."

Altera is moving up the date for volume production of the Stratix III as much as possible, and commented, "Volume production will start on the first chip in the fourth quarter of 2007 or the first quarter of 2008, and all the chips will be in volume production by mid-2008." Altera has outsourced production to Taiwan Semiconductor Manufacturing Co Ltd of Taiwan. When technology shifted to 90nm, Altera had all chips in volume production seven to ten months after sample shipment (Fig 1), and promises it will have all the Stratix III chips in volume production three to six months after sample shipment this time.

by Motoyuki Ooishi

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