FPAAs Offer Fast Route to Analog System Design
| Geographic Eligibility (Edition) | Medium (Click where applicable) |
|---|---|
| Hong Kong, Malaysia, the Philippines, Singapore and Thailand (English) | Magazine + e-newsletter E-newsletter only |
| India (English) | Digital magazine + e-newsletter E-newsletter only |
| Taiwan (Complex Chinese) |
Magazine + e-newsletter E-newsletter only |
| South Korea(Korean) | Magazine + e-newsletter E-newsletter only |
| Other countries/regions | E-newsletter only *Readers from other countries/regions who want to receive Nikkei Electronics Asia printed magazine may consider paid subscription. Please contact NE Asia Circulation Department for details. |
Although a variety of programmable analog arrays have been available on the market for about 10 years, none of them has provided the reconfiguration flexibility that makes FPGAs such invaluable devices for digital designers. Now, however, by combining general-purpose analog resources with static random access memory (SRAM) configuration logic, Anadigm has created a field-programmable analog array (FPAA) that looks set to revolutionize analog system design.
Field Programmable Analog Array
The AN10E40 FPAA comprises a 20-cell op-amp array arranged in a 4 x 5 matrix, surrounded by a programmable interconnect and I/O structure. The device is packaged as an 80-lead 14mm2 QFP, requires a single 5V plus-minus 5% DC supply, and has a typical power consumption of less than 13mW per active cell. Many of the more common signal conditioning functions such as rectifiers, gain stages, comparators and first-order filters can be implemented using just one cell. More complex functions such as high-order filters, oscillators, pulse-width modulators and equalizers can be implemented using two or more cells. The frequency range of the FPAA depends upon the circuit functions that are being implemented; the amplifiers have a bandwidth of 5MHz and the maximum switching clock rate is 1MHz. Typically, the entire array can handle signal frequencies from DC to 500kHz, making it suitable for filtering, instrumentation and control applications in industrial, medical, automotive and low-to-medium frequency communications markets.
Optimized Technology
The FPAA's circuit elements are dynamically configured each time the device powers-up, using data held in on-chip SRAM; the SRAM is automatically loaded direct from a low-cost serial EPROM during the power-up sequence, in a similar manner to the configuration cycle of an FPGA. Alternatively, the FPAA can be reconfigured on-the-fly by data from a microcontroller, making it an extremely versatile and space-saving component. Reconfiguration can be accomplished within 100microseconds, which is more than fast enough to allow, for example, several signal inputs to be multiplexed to a single analog signal conditioning circuit. This ability to handle in-service changes to configuration -- or even functionality -- brings unprecedented flexibility to the world of analog design.
Each configurable analog block (CAB) comprises an amplifier surrounded by a switched-capacitor feedback network, as shown in Fig 1. These binary-weighted capacitor clusters can be set to any one of 256 different values. It is the use of this technology that is key to the FPAA's versatility, enabling highly stable RC-equivalent networks to be implemented using just switches and capacitors.
Fig 2 contrasts a conventional resistor-based circuit with a switched-capacitor circuit; the charge that is transferred from node 1 to node 2 depends (to the first approximation) on the capacitor's value and the switching duty cycle, effectively making the FPAA an analog sampled-data device.
Drag and Drop Design Ease
Designing an analog system based on the AN10E40 FPAA is something of a malapropism, in that the process demands minimal circuit knowledge, analog simulation skills or maths abilities. A free CAD tool known as AnadigmDesigner (which can be downloaded from the Website at www.anadigm.com) enables the entire "design", simulation and FPAA SRAM download process to be accomplished in as short a time as 10 minutes. The software runs on a standard PC, and includes a library of more than 50 configurable analog circuit functions that range from simple amplifiers, comparators, integrators and differentiators through to complex functions such as bi-quad filters. Most of the functions consume just one of the FPAA's 20 cells, and none takes more than three.
Building an analog circuit is simply a case of selecting the appropriate analog functions from the library by "drag and dropping" them onto the screen display of the complete array, and "click-dragging" appropriate signal interconnects. The performance characteristics of each function are specified via pop-up dialog boxes, and should a chosen signal interconnect route not be available, the software automatically advises the user to choose an alternative. The software also provides facilities for programming the array's clock generators and voltage reference source, and for connecting or disconnecting a mid-rail voltage reference source to the array's analog signal ground.
This approach to design means that users do not need to worry about the underlying circuit implementation. For example, to build a signal conditioning chain, users simply select a summing amplifier and filter from the function library, specify the desired offset correction, gain and low-pass frequency parameters, and interconnect the array cells. AnadigmDesigner includes a built-in simulator that allows a virtual signal generator and oscilloscope to be placed strategically within the array. The signal generator provides standard waveforms such as sine, square, triangle and ramp, as well as pulse outputs and arbitrary waveforms. The software also accepts linear descriptions of arbitrary waveforms in numerical text-file format -- just like many of the digital storage scopes on the market -- and is capable of processing Windows' standard pulse-code-modulation encoded WAV-format files. Once the design has been functionally checked with the simulator, the configuration data can be downloaded to the FPAA's SRAM and the circuit's "real world" performance evaluated using standard bench test equipment. This "electronic breadboard" approach to analog design reduces development time and costs significantly, helping users to accelerate the introduction of their products to market.
Flexible Development Environment
Electronics engineers who wish to evaluate FPAAs -- especially if they are interested in exploring the concept of adapting FPAA functionality in the field -- will probably choose to use the AN10DS40 FPAA development board (Fig 3). This provides an AN10E40 FPAA and an RS-232 interface to facilitate downloading of configuration data from the PC running AnadigmDesigner software. The board is equipped with numerous connectors, interfaces and status LEDs, and includes a socket for a serial boot PROM, as well as an on-board 1MHz oscillator and a regulated +5V supply. It also incorporates a Motorola 68HC908 microcontroller to allow dynamic modification of FPAA functionality, and a standard peripheral interface which enables users to employ different microcontrollers or host systems if they wish.
A filter synthesis tool has recently been added to the free FPAA configuration software. Known as FilterDesigner, it provides users with a versatile means of creating high-order classical filters and then combining them with additional signal conditioning circuitry to implement complete, single-chip, analog solutions. High-pass, low-pass, band-pass and band-stop filters, for example, can be created in minutes, using combinations of the standard bi-linear and bi-quad filter configurations from the analog function library.
by Richard Ivie, Market Development Engineer, Anadigm, USA
(April 2002 Issue, Nikkei Electronics Asia)















