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First Sample Devices Presented at ISSCC 2002
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The ISSCC (International Solid-State Circuits Conference, organized by the IEEE) 2002, held February 3-7 in San Francisco, California, attracted more than 3,000 registered visitors. 171 accepted papers were delivered on topics ranging from analog, digital, signal processing and memories, via imagers, displays and MEMS, as well as technology directions, wireless, and wireline communications. Several of the devices described in the papers are already close to first sample.
Texas Instruments (TI) presented a single-chip hearing aid system, claimed to offer audio performance superior to that of other published chips. Circuit and architectural design techniques have reduced system power to a level at which a small zinc-air battery (minimum operating voltage: 1.1V) can provide 40 days of operating life.
In the digital arena, Compaq Computer showed the latest Alpha superscalar processor, with a performance 2.5 to 3 times that of the previous generation. This proposed 4-way multi-threaded 8-way superscalar microprocessor is implemented on about 420mm2 the Alpha instruction set in a 0.125micron partially depleted SOI technology. Improvements over the previous design include doubling the instruction issue width to eight, increasing the L2 Cache from 1.75 Mbytes to 3 Mbytes, and migrating from a bulk 0.175micron CMOS process. 4-way simultaneous multi-threading further increases utilization of the eight integer and four floating point execution units by allowing concurrent execution of up to 4 independent program threads.
Intel and Hewlett Packard jointly explained details of the 1GHz secondgeneration Itanium architecture processor with 8-stage pipeline and three levels of memory hierarchy exceeding 3.3 Mbytes. Also, Intel's Microprocessor Research Labs offered some insight into a 6.5GHz single-ended dynamic ALU and instructionscheduler loop with eight entries and two 32-bit ALUs, which is manufactured in 130nm dual-voltage CMOS technology.
In the imager area, STMicro-electronics presented an independently-powered custom-format 1,120 x 1,808 pixel array CMOS image sensor which is designed as a 35mm film replacement sensor without any modification to the (standard SLR) camera. The device is colorized with a Bayer RGB pattern color filter array and offers 3 frames/s full format output, as well as sub-sampled video output. The large physical format (active sensor area: 24 x 36mm2) requires the use of reticle stitching with the 0.5micron 3-metal 2-poly technology used.
Memories
Both Samsung and Toshiba presented papers on 1-Gbit NAND Flash memories. While Samsung's device (die size: 129.6mm2) is operated with 1.8V, it offers a programming time of 300microseconds, while Toshiba's Flash memory (die size: 125.2 mm2) provides block programming times of 200microseconds at a supply voltage between 2.7 and 3.6V.
California-based companies Intel, Ovonyx and Azalea jointly discussed the development status of ovonic unified memory (OUM), which is a phase-change, non-volatile semiconductor memory technology for stand-alone and embedded applications. A 4-Mbit VLSI test memory is used as a development vehicle with 0.18micron 3V CMOS. OUM offers advantages in cell size, process complexity, cost, write times, cycling, and cell energy consumption during write and direct overwrite.
Data storage is accomplished in an OUM cell by a thermally-induced phase change between amorphous and polycrystalline states in a thin film of chalcogenide alloy, similar to the materials used in rewriteable CD and DVD optical disks. This rapid reversible structural change in the GexSbyTe alloy film results in a change in material resistivity that is measured during the read operation.
OUM technology uses a short electrical pulse to achieve the amorphous state (high-resistance RESET state) and a lower but slightly longer current pulse to convert to the polycrystalline state. Due to the small programmable volume of the film, the programming energy is small. Unlike with Flash and other non-volatile memories, no high-voltage transistors are needed. Furthermore, OUM memory is seamlessly embedded in a logic process by using low temperature OUM memory process modules after transistor formation.
by Alfred Vollmer
(April 2002 Issue, Nikkei Electronics Asia)
Texas Instruments (TI) presented a single-chip hearing aid system, claimed to offer audio performance superior to that of other published chips. Circuit and architectural design techniques have reduced system power to a level at which a small zinc-air battery (minimum operating voltage: 1.1V) can provide 40 days of operating life.
In the digital arena, Compaq Computer showed the latest Alpha superscalar processor, with a performance 2.5 to 3 times that of the previous generation. This proposed 4-way multi-threaded 8-way superscalar microprocessor is implemented on about 420mm2 the Alpha instruction set in a 0.125micron partially depleted SOI technology. Improvements over the previous design include doubling the instruction issue width to eight, increasing the L2 Cache from 1.75 Mbytes to 3 Mbytes, and migrating from a bulk 0.175micron CMOS process. 4-way simultaneous multi-threading further increases utilization of the eight integer and four floating point execution units by allowing concurrent execution of up to 4 independent program threads.
Intel and Hewlett Packard jointly explained details of the 1GHz secondgeneration Itanium architecture processor with 8-stage pipeline and three levels of memory hierarchy exceeding 3.3 Mbytes. Also, Intel's Microprocessor Research Labs offered some insight into a 6.5GHz single-ended dynamic ALU and instructionscheduler loop with eight entries and two 32-bit ALUs, which is manufactured in 130nm dual-voltage CMOS technology.
In the imager area, STMicro-electronics presented an independently-powered custom-format 1,120 x 1,808 pixel array CMOS image sensor which is designed as a 35mm film replacement sensor without any modification to the (standard SLR) camera. The device is colorized with a Bayer RGB pattern color filter array and offers 3 frames/s full format output, as well as sub-sampled video output. The large physical format (active sensor area: 24 x 36mm2) requires the use of reticle stitching with the 0.5micron 3-metal 2-poly technology used.
Memories
Both Samsung and Toshiba presented papers on 1-Gbit NAND Flash memories. While Samsung's device (die size: 129.6mm2) is operated with 1.8V, it offers a programming time of 300microseconds, while Toshiba's Flash memory (die size: 125.2 mm2) provides block programming times of 200microseconds at a supply voltage between 2.7 and 3.6V.
California-based companies Intel, Ovonyx and Azalea jointly discussed the development status of ovonic unified memory (OUM), which is a phase-change, non-volatile semiconductor memory technology for stand-alone and embedded applications. A 4-Mbit VLSI test memory is used as a development vehicle with 0.18micron 3V CMOS. OUM offers advantages in cell size, process complexity, cost, write times, cycling, and cell energy consumption during write and direct overwrite.
Data storage is accomplished in an OUM cell by a thermally-induced phase change between amorphous and polycrystalline states in a thin film of chalcogenide alloy, similar to the materials used in rewriteable CD and DVD optical disks. This rapid reversible structural change in the GexSbyTe alloy film results in a change in material resistivity that is measured during the read operation.
OUM technology uses a short electrical pulse to achieve the amorphous state (high-resistance RESET state) and a lower but slightly longer current pulse to convert to the polycrystalline state. Due to the small programmable volume of the film, the programming energy is small. Unlike with Flash and other non-volatile memories, no high-voltage transistors are needed. Furthermore, OUM memory is seamlessly embedded in a logic process by using low temperature OUM memory process modules after transistor formation.
by Alfred Vollmer
(April 2002 Issue, Nikkei Electronics Asia)
