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nVIDIA GPU Supports 128-bit Bus Memory
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nVIDIA Corp has developed a graphic processor unit (GPU), the GeForce4 Ti, which is four times more powerful than its previous generation of GPU, the GeForce3, announced in February 2001.
The GeForce4 Ti 4600 and 4400 each have a 256-bit graphic core and a 128-bit bus width DDR SDRAM supporting interface, and provide 10.4-Gbyte/s and 8.8-Gbyte/s memory bandwidth respectively, as well as 4.8-Gsample/s and 4.4-Gsample/s fill-rendering rate respectively. The triangle rendering rates are 136 million triangles/s and 125 million triangles/s.
To achieve these higher performances, the GPU has a built-in nVIDIA nfiniteFX II engine consisting of a dual programmable vertex shader, a high-speed pixel shader and a 3D texture rendering engine, as well as a built-in 128-bit bus width DDR memory interface and quad cache memories to allow pipeline access of image data. Effective memory usage methodology includes 1/4 compression of Z-axis data and occlusion culling technology, which does not render a hindered image backside of a target object.
While providing a higher drawing performance, the chips have anti-aliasing processing to draw smooth images without any tooth-form contouring of images. NView multiple display architecture enables users to connect up to 16 displays to a single PC.
(April 2002 Issue, Nikkei Electronics Asia)
The GeForce4 Ti 4600 and 4400 each have a 256-bit graphic core and a 128-bit bus width DDR SDRAM supporting interface, and provide 10.4-Gbyte/s and 8.8-Gbyte/s memory bandwidth respectively, as well as 4.8-Gsample/s and 4.4-Gsample/s fill-rendering rate respectively. The triangle rendering rates are 136 million triangles/s and 125 million triangles/s.
To achieve these higher performances, the GPU has a built-in nVIDIA nfiniteFX II engine consisting of a dual programmable vertex shader, a high-speed pixel shader and a 3D texture rendering engine, as well as a built-in 128-bit bus width DDR memory interface and quad cache memories to allow pipeline access of image data. Effective memory usage methodology includes 1/4 compression of Z-axis data and occlusion culling technology, which does not render a hindered image backside of a target object.
While providing a higher drawing performance, the chips have anti-aliasing processing to draw smooth images without any tooth-form contouring of images. NView multiple display architecture enables users to connect up to 16 displays to a single PC.
(April 2002 Issue, Nikkei Electronics Asia)
